/*
 * alu.v - ALU for a PIC-family microprocessor.  specificly 16C62X, 
 * but similar to (and maybe same as) others.
 *
 * Copyright 1999 Steve Tell.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public
 * License along with this program; if not, write to the Free
 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */

`include "funcs.v"

module alu(Clk, Q, busin, literal, Lw, Sw, cin, ALUout, 
	   cout, DC, Z, Amuxfunc, bitno, op);

   input Clk;
   input [3:0] Q;
   input [7:0] busin;   // operand read from register/memory
   input [7:0] literal; // literal operand from instruction
   input       Lw;	// B mux select 1=literal 0=register via rbus
   input       Sw;	// Store ALU result to w register if 1
   
   input	cin;
   input [2:0]	Amuxfunc;
   input [2:0]	bitno;
   input [3:0]	op;
   output [7:0]	ALUout;
   output	cout;
   output	DC;
   output	Z;

   reg 		Z;
   reg 		DC;
   reg 		cout;
   reg [7:0]	am;
   reg [7:0]	Aval;
   reg [7:0]	ALUout;
   reg [7:0]	W;
		
 // A multiplexor
   always @(Amuxfunc or W or bitno) begin
      case(Amuxfunc[1:0])
	`AF0 : am = 0;
	`AFW : am = W;
	`AF1 : am = 8'h01;
	`AFB : am = 1<<bitno;
      endcase // case(Amuxfunc[1

  // complement: used for subtract, bit-clear, decrement.
      Aval = Amuxfunc[2] ? ~am : am;
   end

 // B mux
   wire [7:0] Bval = Lw ? literal : busin;

   always @(Aval or Bval or cin or op) begin
      casez(op)
	`ALU_ADD  : {cout, ALUout} = Aval + Bval;
	`ALU_ADD1 : {cout, ALUout} = 9'h100 ^ (Aval + Bval + 9'h001); // compl A for subtract
	`ALU_AND  : {cout, ALUout} = {1'b0, Aval & Bval};
	`ALU_OR   : {cout, ALUout} = {1'b0, Aval | Bval};
	`ALU_XOR  : {cout, ALUout} = {1'b0, Aval ^ Bval};
	`ALU_B    : {cout, ALUout} = {1'b0, Bval};
	`ALU_A    : {cout, ALUout} = {1'b0, Aval};
	`ALU_SWAPB: {cout, ALUout} = {1'b0, Bval[3:0], Bval[7:4]};
	`ALU_RRB  : {cout, ALUout} = {Bval[0], cin, Bval[7:1]};
	`ALU_RLB  : {cout, ALUout} = {Bval[7], Bval[6:0], cin};
	4'b????   : begin 
	    {cout, ALUout} = {1'b0, Aval};
	    $display("%d bad alu OP %b", $time, op); 
	end
      endcase // case(Amuxfunc[1
      Z = (ALUout==8'h00) ? 1 : 0;

      // TODO: generate decimal carry flag DC.
       DC = 1'b0;

   end // always @ (Aval or Bval or cin or op)
   
   always @(posedge Clk)
       if((Q[3] & Sw) == 1) begin
	   W <= ALUout;
       end // if ((Q[3] & Sw) == 1)
   
   
endmodule