A Space-efficient and hardware-friendly Implementation of Ptex
Sujeong Kim (University of North Carolina at Chapel Hill)
Karl Hillesland (Advanced Micro Devices, Inc.)
Justin Hensley (Advanced Micro Devices, Inc.)
We introduce a method to pack Ptex per-face texture data that is both space-efficient and hardware-friendly. Recently presented real-time implementations of Ptex have been wasteful with space and required a storage cost many times higher than the size of the original texture data. Our method packs multiple levels of Ptex data together, and requires only around 8% increase in storage for our test textures. Additionally, because of efficient data packing, our method wastes less space than a typical texture atlas, which requires buffer regions to be added between the separate charts within the texture.
Sketch Paper [PDF 228KB]
Sujeong Kim, Karl Hillesland, and Justin Hensley, A space-efficient and hardware-friendly implementation of Ptex, In SIGGRAPH Asia 2011 Sketches. ACM, New York, NY, USA, , Article 31 , 2 pages. DOI=10.1145/2077378.2077417
Video [MOV 32.6MB]
|(a) a single Ptex asset rendered in
our real-time graphics engine.
|(b) the texture data stored as a texture atlas.||(c) the same base texture data
stored as a packed Ptex texture.
Only 63% of the texels in the texture atlas contain actual color data, while 93% of texels in the packed Ptex texture contain data. Additionally, the packed Ptex texture contains all the mip-map levels instead of just a single level. The packed Ptex texture needs only 10% extra texels added to accelerate bilinear texture filtering. This rather modest increase in size can be eliminated at the cost of manually performing interpolation in shader.